P4 GSoC 2025 Ideas List
P4 GSoC 2025 Ideas List
Application process
Please check our Contributor Guidance for detailed instructions.
Potential mentors
⭐ = available as primary mentor
- ⭐ Ali Imran (@ALI11-2000, imranali@umich.edu)
- ⭐ Annus Zulfiqar (@annuszulfiqar2021, zulfiqaa@umich.edu)
- ⭐ Anton Korobeynikov (@asl, anton@korobeynikov.info)
- ⭐ Bili Dong (@qobilidop, bilid@google.com)
- ⭐ Davide Scano (@Dscano, d.scano89@gmail.com)
- ⭐ Matthew Lam (@matthewtlam, matthewtlam@google.com)
- ⭐ Mingyu Ma (@Mingyumaz, mingyu.ma@tu-dresden.de)
- Antonin Bas (@antoninbas)
- Ben Pfaff (@blp)
- Fabian Ruffy (@fruffy, fruffy@nyu.edu)
- Jonathan DiLorenzo (@jonathan-dilorenzo, dilo@google.com)
- Muhammad Shahbaz (@msbaz2013, msbaz@umich.edu)
- Murayyiam-Parvez (@Murayyiam-Parvez, parvezm@purdue.edu)
- Tommaso Pecorella(@TommyPec, tommaso.pecorella@unifi.it)
- Walter Willinger
FAQ
Note: you = contributors, we = mentors.
Q1: Some mentors are listed as primary mentor for multiple projects. How does that work?
For the application phase, we’d like to present more options for you to choose from. Eventually, depending on the applications received, they will decide on at most 1 project to commit to as a primary mentor.
Q2: What do our project difficulties mean?
: Basic coding skills are sufficient.
: CS undergraduate level knowledge/skills are required.
: Deeper and more specialized knowledge/skills are required.
Q3: Project sizes are specifided in hours. How many weeks do they correspond to?
Q4: Some projects have an “alternative qualification task” section. What does that mean?
It means for that specific project, instead of the general qualification task, you shall complete the alternative qualification task described in that section.
Q5: Some “alternative qualification task” section says “demonstrate your XYZ skills through contributions to”. What does that mean?
It means we expect you to have made relevant contributions in order to demonstrate your XYZ skills. In your applicaiton, please briefly describe your contributions, and attach related links (e.g. pull requests on GitHub).
Project ideas
Index
- Category: core P4 tooling
- Category: exploratory P4 tooling
- Category: P4 research
Project 1: Integrate p4-constraints frontend into P4C ⤴️
[!Note] This project is cancelled for this year.
Basic info
- Potential mentors
- Primary: Matthew Lam
- Support: Jonathan DiLorenzo, Fabian Ruffy
- Skills
- Required: Git, C++
- Preferred: CMake, Bazel, P4C
- Discussion thread: TBD
Alternative qualification task
- Currently, the type checking function, InferAndCheckTypes, explicitly fails when called on an already type-checked expression. Ideally, this behavior should be idempotent; causing no change to an already type-checked expression, but also not causing an error. This would allow us to use it to ensure that expression were properly typed and had certain types.
- Create a PR under https://github.com/p4lang/p4-constraints with the fix.
Project description
p4-constraints is a useful extension of the P4 programming language that is currently architected as a standalone library separate from the P4 compiler, P4C.
The goal of this project is to integrate the p4-constraints frontend, which parses and type checks the constraint annotations, into the P4C frontend. This architecture change provides the following benefits:
- For P4 programmers: Immediate feedback about syntax or type errors in constraints during P4 compilation.
- For P4C backend developers: Easy consumption of the parsed & type-checked constraints.
P4TestGen is a concrete example of a P4C backend that needs to consume p4-constraints to work correctly, and it currently does this by implementing its own p4-constraints frontend, which is brittle and requires duplication of work for new p4-constraint features.
Expected outcomes
- The p4-constraints frontend becomes part of P4C.
Resources
- https://github.com/p4lang/p4-constraints
- https://github.com/p4lang/p4c
- https://github.com/p4lang/p4c/pull/4387
Project 2: BMv2 packet trace support ⤴️
Basic info
- Potential mentors
- Primary: Matthew Lam
- Support: Jonathan DiLorenzo, Bili Dong, Antonin Bas
- Skills
- Required: Git, C++
- Preferred: P4
- Discussion thread: TBD
Alternative qualification task
- Currently, BMv2 uses some legacy code written in C with bf_lpm_trie.c being one of the instances.
- Create a PR under https://github.com/p4lang/behavioral-model that converts the C code to C++. Note that style and readability are key.
Project description
Having programmatic access to the trace of a packet going through a P4 pipeline (e.g. applied tables, actions, entries hit, etc) has many use cases from human comprehension to use by automated tools for test coverage measurement, automated test generation, automated root causing, etc.
BMv2 currently does provide textual logs that can be used to manually track the packet as it goes through the pipeline. However there is no API to access the trace in a more structured and programmatic form (i.e. in a way that can potentially be digested by other tools).
The goal of this project is to provide a mechanism for BMv2 to record the trace and provide it to the user in a structured format.
Expected outcomes
- Structured packet trace outputs supported in BMv2.
Resources
- BMv2: https://github.com/p4lang/behavioral-model
Project 3: BMv2 with all possible output packets ⤴️
Basic info
- Potential mentors
- Primary: Matthew Lam
- Support: Jonathan DiLorenzo, Bili Dong, Antonin Bas
- Skills
- Required: Git, C++
- Preferred: P4
- Discussion thread: TBD
Alternative qualification task
- Currently, BMv2 uses some legacy code written in C with bf_lpm_trie.c being one of the instances.
- Create a PR under https://github.com/p4lang/behavioral-model that converts the C code to C++. Note that style and readability are key.
Project description
There are many situations where it is more useful to have all possible outputs from a P4 simulation rather than only a single one. For example, we use this for diff testing, to determine whether the switch is doing something correct or something incorrect.
Multiple allowed behaviors usually arise from various multi-path constructs (e.g. ECMP, WCMP, or perhaps LAGs) usually modeled as action profiles in P4. BMv2 currently allows users to set a mode determining action profile behavior, like round robin which means that every time you send in the same packet, it should result in the next possible outcome (eventually wrapping around).
The goal of this project is to provide a new mode for BMv2 to instead output ALL possible behaviors. This will both require extending the action profile modes, and likely extending the notion of output from a set of packets to a set of sets of packets.
Expected outcomes
- BMv2 has a modality where every possible outcome is generated instead of one possible outcome.
- Must interact correctly with multicast and punting.
Resources
- BMv2: https://github.com/p4lang/behavioral-model
Project 4: Finalize Katran P4 and improve the eBPF backend! ⤴️
Basic info
- Potential mentors
- Primary: Davide Scano
- Support: Fabian Ruffy
- Skills
- Discussion thread: TBD
Alternative qualification task
- Please demonstrate your XDP eBPF skills through contributions to any of the following projects:
- Any existing XDP eBPF project.
- Any personal project that has used XDP eBPF.
- Please demonstrate your basic P4 knowledge through contributions to any of the following projects:
- Any existing P4 project, preferably P4 tutorials or P4C.
- Any personal project that incorporates P4.
Project description
Katran is designed to build a high-performance load balancer based on C and eBPF. The P4 open-source compiler, P4C, supports eBPF as one of its possible targets. This allows a P4 program to be converted into an eBPF program for packet processing. The maintenance of the eBPF backend relies on simple examples that are used to test the backend. The lack of complex programs makes developing and evaluating new features, as well as identifying regressions, more challenging.
Finalize the implementation of Katran in P4 helps provide a complex program example imporve the test coverage of eBPF backend. Due to that possible bugs can be identifed and fixd together with new features can be implemented.
Expected outcomes
- Document and complete the P4 implementation of Katran.
- Identify and/or resolve bugs in the P4C eBPF backend.
- If needed, update the P4C eBPF backend documentation.
Resources
- Katran: https://github.com/facebookincubator/katran
- Katran P4: https://github.com/Dscano//P4-Katran
- P4C eBPF backend: https://github.com/p4lang/p4c/tree/main/backends/ebpf
- NIKSS: https://github.com/NIKSS-vSwitch/nikss
Project 5: P4Simulator: Enabling P4 Simulations in ns-3 ⤴️
Basic info
- Potential mentors
- Primary: Mingyu Ma
- Support: Tommaso Pecorella, Davide Scano
- Skills
- Discussion thread: TBD
Project description
P4Simulator is a P4-driven network simulator that aims to combine P4—the state-of-the-art programmable data plane language—with ns-3, one of the most popular and versatile network simulators. While the current module already supports basic P4 functionality in ns-3, there remain numerous areas that require further development, as outlined in the Alternative qualification task. We also welcome discussions on any other ideas or improvements you may wish to propose for P4Simulator.
To advance the development of P4Simulator, we invite contributions in several key areas, including but not limited to:
- Control Plane Enhancement: Improving control plane support for seamless interaction between P4 programs and ns-3.
- PSA Architecture Completion: Implementing full support for the Portable Switch Architecture (PSA) within P4Simulator.
- High-Speed Ethernet Link Module: Developing a high-performance Ethernet link model to simulate real-world network conditions.
- Other Enhancements & Extensions: Exploring additional improvements to expand the functionality and efficiency of P4Simulator.
Furthermore, we encourage discussions on novel ideas and enhancements that could contribute to the evolution of P4Simulator, making it a more powerful and flexible tool for network simulation research.
Expected outcomes
- Complete the development and submission of the corresponding project.
Resources
Currently, the p4sim repository is private (Prepare the paper for ICNS3), but it will be made open-source on March 21, 2025, at 17:00 EST. This delay allows for ongoing research, refinement, and the preparation of related publications before public release.
Project 6: P4MLIR: MLIR-based high-level IR for P4 compilers ⤴️
Basic info
- Potential mentors
- Primary: Anton Korobeynikov
- Support: Bili Dong, Fabian Ruffy
- Skills
- Required: MLIR
- Preferred: P4, P4C
- Discussion thread: TBD
- A bit more information: slides
Alternative qualification task
- Please demonstrate your MLIR skills through contributions to any of the following projects:
- P4MLIR itself.
- Any other MLIR-based compiler project.
- Your personal project is also fine.
- Make sure your contributions could demonstrate your knowledge of MLIR concepts & internals.
Project description
P4C, being a reference compiler for the P4 language, struggles with some fundamental shortcomings of its internal code representation (IR). These issues result in increased running time of the compiler itself as well as unacceptable memory consumption of certain compiler passes.
Since these problems lie at the foundation of the present IR, as an alternative to just fixing them (that would require some redesign of the IR and would require some invasive changes in the compiler codebase) we are aiming to explore alternative solutions that might at the same time open more opportunities for future growth and expansion of the compiler. One of such possibilities is to explore the adoption of the results of MLIR project to be used within P4C.
In particular, we aim to develop a P4-specific MLIR dialect (P4HIR) that would allow reuse the infrastructure, code analysis, and transformation passes that have recently been developed within MLIR framework.
Since P4MLIR is a moving target, the precise set of tasks within this project is TBD at the time of project proposal submission. This might include (but not limited to):
- Implementation of certain dialect operations corresponding to P4 constructs
- Implementation of some dialect interfaces allowing high-level transformations (e.g. Mem2Reg, SROA, data flow analyses)
- Reimplementation of P4C frontend / midend passes in MLIR
- Lowering to P4 high-level dialect to lower-level constructs:
- Implementing control plane metadata emission out of
P4HIR
The exact list of tasks is to be determined with mentors.
Expected outcomes
- Implementation of the mentioned
P4HIRadvancements - Document the changes made
Resources
- P4MLIR: https://github.com/p4lang/p4mlir
- P4C: https://github.com/p4lang/p4c
- MLIR: https://mlir.llvm.org/
Project 7: P4MLIR BMv2 Dialect Prototype ⤴️
Basic info
- Potential mentors
- Primary: Bili Dong
- Support: Anton Korobeynikov, Fabian Ruffy
- Skills
- Discussion thread: https://github.com/p4lang/p4mlir-incubator/issues/139
Alternative qualification task
- Please demonstrate your MLIR skills through contributions to any of the following projects:
- P4MLIR itself.
- Any other MLIR-based compiler project.
- Your personal project is also fine.
- Make sure your contributions could demonstrate your knowledge of MLIR concepts & internals.
Project description
BMv2 is a popular software simulator target for P4. In our current open source P4 compiler P4C, when targeting BMv2, a P4 program is converted to a JSON file, which BMv2 uses as a specification for processing packets. In P4MLIR, we plan to add a dialect specifically for modeling BMv2 JSON primitives, so that the BMv2 dialect -> BMv2 JSON transformation could be straightforward.
In the longer term, we expect a compilation path like P4C frontend -> P4HIR dialect -> BMv2 dialect -> BMv2 JSON. For this GSoC project, we will concentrate on implementing a subset of BMv2 JSON primitives in the BMv2 dialect, and implementing the corresponding BMv2 dialect -> BMv2 JSON transformation.
Expected outcomes
- A subset of BMv2 JSON primitives are defined in the BMv2 dialect.
- The BMv2 dialect -> BMv2 JSON transformation works for this subset of primitives.
Resources
- P4MLIR: https://github.com/p4lang/p4mlir
- BMv2 JSON format: https://github.com/p4lang/behavioral-model/blob/main/docs/JSON_format.md
- P4C BMv2 backend: https://github.com/p4lang/p4c/tree/main/backends/bmv2
Project 8: Gigaflow: A Smart Cache for a SmartNIC! ⤴️
Basic info
- Potential mentors
- Primary: Annus Zulfiqar, Ali Imran
- Support: Davide Scano, Ben Pfaff, Muhammad Shahbaz
- Skills
- Required: Xilinx Vivado SDK/FPGA Development
- Preferred: OVS, P4, DPDK
- Discussion thread: TBD
Alternative qualification task
- Please demonstrate your FPGA skills through contributions to any of the following projects:
- Any existing Xilinx Open NIC or NetFPGA projects.
- Any personal project that has used Xilinx Vivao tools.
- Please demonstrate your basic P4 knowledge through contributions to any of the following projects:
- Any existing P4 project.
- Any personal project that incorporates P4.
- Please demonstrate your basic Virtual Networking knowledge through contributions to any of the following projects:
- Any existing OVS project.
- Any personal project that incorporates OVS.
Project description
Open vSwitch (OVS) is a widely-adopted virtual switch (vSwitch) in cloud deployments and data centers. Gigaflow (appearing at ASPLOS’25) is a recent advancement that massively improves OVS forwarding performance by offloading a novel multi-table cache architecture to SmartNICs, thereby reducing the CPU-bound cache misses and improving the end-to-end forwarding latency. This project aims to develop a P4-based SmartNIC backend for Gigaflow cache in OVS for P4-programmable FPGA SmartNICs, e.g., the Xilinx Alveo U55/U250 Data Center Accelerator, and modern off-the-shelf SmartNICs, such as AMD Pensando DPU.
Expected outcomes
- OVS-to-P4 Compilation Pipeline: Improve the existing OVS → P4-SDNet → FPGA codebase to enable seamless compilation to FPGA-based SmartNICs.
- SmartNIC Backend Development: Extend support beyond FPGA-based SmartNICs to include Pensando DPUs as a backend target.
- Upstream Integration: Work towards making Gigaflow a mainstream OVS backend, ensuring maintainability and adoption.
Resources
- Gigaflow ASPLOS-25 Artifact: https://github.com/gigaflow-vswitch
- Open vSwitch: https://github.com/openvswitch/ovs
- P4 Language: Tutorial-1, Tutorial-2
Project 9: SpliDT: Scaling Stateful Decision Tree Algorithms in P4! ⤴️
Basic info
- Potential mentors
- Primary: Annus Zulfiqar, Ali Imran
- Support: Davide Scano, Walter Willinger, Muhammad Shahbaz, Murayyiam-Parvez
- Skills
- Required: P4, P4RT
- Preferred: P4Studio, Familiarity with P4Runtime architecture and using gRPC to manage pipeline state (e.g., rule insertion, digest processing, registers).
- Discussion thread: TBD
Alternative qualification task
- Please demonstrate your basic P4 knowledge through contributions to any of the following projects:
- Any existing P4 project.
- Any personal project that incorporates P4.
- Qualification Task: https://github.com/nextgarch/gsoc/tree/main
Project description
Machine learning is increasingly deployed in programmable network switches for real-time traffic analysis and security monitoring. SpliDT is a scalable framework that removes traditional feature constraints in decision tree (DT) inference by dynamically selecting relevant features at runtime rather than requiring a fixed set per flow. The goal is to enhance accuracy and scalability in high-speed network environments. This project aims to implement and optimize SpliDT using P4, TensorFlow, scikit-learn, and HyperMapper.
Expected outcomes
- Develop a P4-based implementation of the partitioned DT inference model for P4-programmable switches, leveraging recirculation to efficiently manage resources.
- Evaluate performance across programmable data planes, optimizing the balance between accuracy, scalability, and switch resource efficiency.
- The project will target deployment on Tofino-based switches and other programmable switch architectures, ensuring practical applicability in real-world network monitoring and security scenarios.
Resources
- P4 Language: Tutorial-1, Tutorial-2
- In-Network ML: Taurus Tutorial at SIGCOMM
- HyperMapper: https://github.com/luinardi/hypermapper
- Tensorflow: https://www.tensorflow.org/


